Study and development of microelectronics application specific integrated circuits (asics) chips for the readout of detectors

Abstract

This thesis deals with the study and development of microelectronics and application specific integrated circuits (ASICs) chip for the readout of detectors. The main target detectors are pixel-strip and small capacitive silicon based detectors for X-rays and gamma rays applications. The fundamentals of readout ASICs in radiation detection systems have been studied. Based on this, general architecture of those readout systems is described. For particles tracking and energy measurement the readout chip is built of an analog front-end for particles extraction and filtering and a digital unit to acquire the filtered data. The analog Front-End application specific integrated circuit chip (ASIC) is made of a charge sensitive amplifier (CSA), a first order pulse shaper which output is triggered by a fast discriminator module based dynamic latch comparator. The CSA being the key element of the design, mathematical analysis based small signal model of its core amplifier has been performed to guarantee high dc-gain which helps in preventing fast particles collection process and wide bandwidth to handle large number of pileup events. Based on this, the design parameters for a low-noise, low-power and stable FE-ASIC has been identified. Transistor level design of the circuit was performed to exhibit an internal gain stage controlled by an external device; giving therefore more flexibility to a user to control the incoming particles flux rate. The input transistors of the CSA and the PS modules have been optimized in terms of channel width, transconductance and drain current. The radiation hardness behavior of spectroscopic front-end electronics (FEE) being affected by the equivalent noise charge (ENC) of the device, namely considered as the parameter that embodies the noise in spectroscopic front-end derives; the ENC of our circuit was well analyzed and optimized with regards to the detector capacitance and circuit parameters. We explore therefore, the effects of each design parameter on the ENC and discussed the possibility of enlarging the incoming particles flux while operating in low-power and low-noise conditions. The radiation tolerant behavior of the circuit was analyzed, giving therefore the opportunity to discuss its amplitude resolution. In addition, we analyzed the pulse shape discrimination strategy of the proposed ASIC. Considering that in silicon based detectors spectroscopy, the particles arrival time is a crucial element for photon tracking and energy measurement. The output of the PS is delayed while discriminating the signals and it results in false photon detection and loss of energy, which worsen the detection efficiency. Considering this, an ultra-fast dynamic latch comparator was designed to minimize the detection delay. We find out that incoming particles can be trigger with a maximum clock rate of 20 GS/s with less than 15 ps time delay; giving therefore the possibility of handling big amount of data while detecting particles with high transverse momentum. This work contributes to the understanding of single photon detection and processing systems. Moreover, it helps to bring our solution to the issue of energy lost, power dissipation and detection efficiency which is encountered in modern silicon based detector front-end ASICs.